Cabin software

Fairchild Dornier will equip its Interior and Future Projects Departments with PACE Aerospace Engineering and Information Technology's cabin engineering software, Pacelab Cabin. The knowledge-based software technology will be used to develop layouts of principle arrangement covering the entire cabin engineering process from concept phase to certification. It largely automates the modeling and positioning of cabin interior items, while checking and assuring compliance with certification regulations and user-defined rules of arrangement.

Real-time operating system

Version 4.0 of Green Hills Software's Integrity real-time operating system supports PowerPC, ARM, MIPS, and XScale processors; features full memory protection and guaranteed resource availability; and delivers sub-200-ns interrupt response and sub-microsecond context switching. It also provides a high-availability API; advanced multi-chassis, multitasking/multiprocessor debugging; and full kernel awareness.

IC design

Flopack v3.1 from Flomerics enhances IC design productivity with a Web-based SmartPart library that allows fast, accurate, and reliable creation of IC packages and associated parts. Parts created within Flopack can be instantly imported into Flomerics' Flotherm software to analyze the cooling requirements of electronic components and systems. New features include a corporate multi-user function, an extended range of Delphi compact models, and a JEDEC Test Environment Wizard.

Material pricing

Micro Estimating Systems' Machine Shop Estimating software can connect to Central Steel pricing 24 hours a day via its Tools4Mfg website connection. New interfaces using XML Extensible Markup Language are key to the capability. The user selects a material in the estimating software and chooses the "request for quote" button. Within seconds, the material pricing and availability is provided.

Chip analysis

Turbo Package Analyzer (TPA) from Ansoft Corp. is a software tool that automates the analysis of complex semiconductor packages. The new version of TPA, which can analyze flip-chip, chip-scale package, and multiple-die system-in-package designs, includes a multipole-accelerated Partial Element Equivalent Circuit engine and an advanced model reduction algorithm for ultra-fast simulations.