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This test plan consists of two major sections for testing of MIL-STD-1553B data bus systems: Bus Network and System Integration Tests.

This SAE Aerospace Standard (AS) contains requirements for a digital time division command/response multiplex data bus, for use in systems integration, that is functionally equivalent to MIL-STD-1553B with Notice 2. Even with the use of this document, differences may exist between multiplex data buses in different system applications due to particular application requirements and the options allowed in this document. The system designer must recognize this fact and design the multiplex bus controller (BC) hardware and software to accommodate such differences. These designer selected options must exist to allow the necessary flexibility in the design of specific multiplex systems in order to provide for the control mechanism, architectural redundancy, degradation concept, and traffic patterns peculiar to the specific application requirements.

This document contains guidance for using SAE publications, AS4112 through AS4117 (MIL-STD-1553 related Test Plans). Included herein are the referenced test plan paragraphs numbers and titles, the purpose of the test, the associated MIL-STD-1553 paragraph, commentary concerning test methods and rationale, and instrumentation requirements.

This document is intended to explain, in detail, the rationale behind the features and functions of the AS4074, Linear, Token-passing, Bus (LTPB). The discussions also address the considerations which a system designer should take into account when designing a system using this bus. Other information can be found in these related documents: AIR4271 - Handbook of System Data Communication AS4290 - Validation Test Plan for AS4074

This SAE Aerospace Standard (AS) contains requirements for a digital time division command/response multiplex data bus, for use in systems integration, that is functionally equivalent to MIL-STD-1553B with Notice 2. Even with the use of this document, differences may exist between multiplex data buses in different system applications due to particular application requirements and the options allowed in this document. The system designer must recognize this fact and design the multiplex bus controller (BC) hardware and software to accommodate such differences. These designer selected options must exist to allow the necessary flexibility in the design of specific multiplex systems in order to provide for the control mechanism, architectural redundancy, degradation concept, and traffic patterns peculiar to the specific application requirements.

This test plan consists of two major sections for testing of MIL-STD-1553B data bus systems: Bus Network and System Integration Tests.

This document is intended to explain, in detail, the rationale behind the features and functions of the AS4074, Linear, Token-passing, Bus (LTPB). The discussions also address the considerations which a system designer should take into account when designing a system using this bus. Other information can be found in these related documents: