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Technical Paper

Serial WireRing - High-Speed Interchip Interface

2012-04-16
2012-01-0198
A new high-performance interchip interface, called Serial WireRing, is introduced. It combines technically mature and established methods, whereby Serial WireRing provides a simple, robust and very inexpensive solution to replace the Serial Peripheral Interface (SPI). Serial WireRing uses a daisy chain ring topology, realized by unidirectional point-to-point connections from device to device. Serial WireRing is realized by a simple “wire ring” with CMOS, LVDS, optical or any other suitable signaling, even mixed. Therefore it has a very low pin count. In order to minimize the latency each slave transmits the data that it receives with 1 bit delay only. In order to avoid clock/data skew, the serial data and clock are merged into one bitstream. A corresponding clock is extracted at each receiver by a clock and data recovery circuit, driven by a simple internal oscillator.
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