Search Results

High demands on advanced safety and driving functions, such as active safety and lane departure warnings, increase a vehicle's dependency on automotive electrical/electronic architectures. Hard real-time requirements and high reliability constraints must be satisfied for the correct functioning of these safety-critical features, which can be achieved by using the AUTOSAR (Automotive Open System Architecture) standard. The AUTOSAR standard was introduced to simplify automotive system design while offering inter-operability, scalability, extensibility, and flexibility. The current version of AUTOSAR does not assist in the replication of tasks for recovering from task failures. Instead, the standard assumes that architecture designers will introduce custom extensions to meet such reliability needs. The introduction of affordable techniques with predictable properties for meeting reliability requirements will prove to be very valuable in future versions of AUTOSAR.

A substantial fraction of automotive collisions occur at intersections. Statistics collected by the Federal Highway Administration (FHWA) show that more than 2.8 million intersection-related crashes occur in the United States each year, with such crashes constituting more than 44 percent of all reported crashes [12]. In addition, there is a desire to increase throughput at intersections by reducing the delay introduced by stop signs and traffic signals. In the future, when dealing with autonomous vehicles, some form of co-operative driving is also necessary at intersections to address safety and throughput concerns. In this paper, we investigate the use of vehicle-to-vehicle (V2V) communications to enable the navigation of traffic intersections, to mitigate collision risks, and to increase intersection throughput significantly.

Multi-core processors are becoming increasingly prevalent, with several multi-core solutions being offered for the automotive sector. Recognizing this trend, the AUTomotive Open System ARchitecture (AUTOSAR) standard Version 4.0 has introduced support for multi-core embedded real-time operating systems. A key element of the AUTOSAR multi-core specification is the spinlock mechanism for inter-core task synchronization. In this paper, we study this spinlock mechanism from the standpoint of timing predictability. We describe the timing uncertainties introduced by standard test-and-set spinlock mechanisms, and provide a predictable priority-driven solution for inter-core task synchronization. The proposed solution is to arbitrate critical sections using the well-established Multi-processor Priority Ceiling Protocol [3], which is the multiprocessor version of the ceiling protocol for uniprocessors [1, 2] used by AUTOSAR.