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The C166 family, based on a 16-bit core; it is nowadays an enormous success in automotive, in particular in PowerTrain. This component is the right answer for the automotive real time applications of today. It is with both, automotive customer requirements and a long automotive experience in semi-conductors that this new generation 32-bit family is borne. The objective of this document is to provide and comment on automotive requirements in terms of the new micro-controller, to show the benefits for the applications and explain how the AUDO architecture fulfils these requirements.

The increasing legal requirements for safety, emission reduction, fuel economy and onboard diagnosis systems push the market for more innovative solutions with rapidly increasing complexity. Hence, the embedded systems that will have to control the automobiles have been developed at such an extent that they are now equivalent in scale and complexity to the most sophisticated avionics systems. This paper will demonstrate the key elements to provide a powerful, scalable and configurable solution that offers a migration pass to evolution and even revolution of automotive Sensors and Sensor interfaces. The document will explore different architectures and partitioning. Sensor technologies such as magnetic field sensors based on the hall effect as well as bulk and surface silicon micro machined sensors will be mapped to automotive applications by examples. Functions such as self-test, self-calibration and self-repair will be developed.

The increasingly stringent requirements in relation to safety, fuel economy, emission reduction, and onboard diagnostics are pushing the automotive industry toward more innovative solutions and a rapid increase in microcontroller performance. This paper will list the key factors necessary to increase overall data throughput and provide the right features to satisfy the coming drivetrain requirements. The paper will address different aspects such as: microcontroller architecture, cores, memories, silicon technologies, assembly / packaging, and development tools. It will also present techniques to improve modularity, scalability and configurability that will offer a migration path to permit the evolution and even revolution of drivetrain electronics. Since quality and reliability requirements are among the most stringent of any application fields, the paper will outline the path to reach zero-defect products.

This paper will give an overview of multicore in automotive applications, covering the trends, benefits, challenges, and implementation scenarios. The automotive silicon industry has been building multicore and multiprocessor systems for a long time. The reasons for this choice have been: increased performance, safety redundancy, increased I/O & peripheral, access to multiple architectures (performance type e.g. DSP) and technologies. In the past, multiprocessors have been mainly considered as multi-die, multi-package with simple interconnection such as serial or parallel busses with possible shared memories. The new challenge is to implement a multicore, micro-processor that combines two or more independent processors into a single package, often a single integrated circuit (IC). The multicores allow a computing device to exhibit some form of thread-level parallelism (TLP).

Prototyping of a complete powertrain controller is not generally permissible due to the large number of subsystems involved and the resources required in making the design a reality. The availability of a complete control system reference design at an early stage in the lifecycle can greatly enhance the quality of the system definition and allows early ideas to be prototyped in the application environment. This paper describes the implementation of such a reference design for a gasoline engine and gearbox management control system, integrated into robust housing which can be used for development in a prototype vehicle. The paper also outlines the powertrain subsystems involved, discusses how the system partitioning is achieved, shows the implementation of the partitioning into the physical hardware, and concludes with presenting the system benefits which can be realized.

This paper outlines the results of a study performed to analyze the mission of TTCAN from applications to products for automotive systems. As commonly acknowledged communication is one of the key elements for future and even present systems such as an automobile. A dramatically increasing number of busses and gateways even in low- to midrange vehicles is putting significant burden upon the validation scenario as well as the cost. Accordingly, numerous new initiatives have been started worldwide in order to find solutions to this; some of them by the definition of enhanced or new protocols. This paper shall have a look particular on the new standard of TTCAN (time-triggered communication on CAN). This protocol is based on the CAN data link layer as specified in ISO 11898-1 and may use standardized CAN physical layers such as specified in ISO 11898-2 (high-speed transceiver) or in ISO 11898-3 (fault-tolerant low-speed transceiver).

More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers with incredible levels of peripheral integration. As a result, performance can no longer be measured in MIPS (Millions of Instructions Per Second). A microcontroller's effectiveness is based on coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, the designer needs benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment.