Digitac Ii--Architecture and Redundancy Management

Document Number: 851824

Date Published: October 1985

Author(s):
R. Gaabo - Honeywell Inc.

Abstract:
The development and flight test evaluation of the architecture and redundancy management techniques used in the DIGITAC digital flight control system (DFCS) are presented in this paper. The architecture is basically a dual-channel Mil-Std-1553 multiplex data bus system. The data busses have the capability for electrical or optical operation.

The DIGITAC flight control system uses in-line self-test in order to achieve fail-operative performance for the computers, remote terminals (RTs) and data busses. Analytical redundancy techniques were used to achieve fail-operative performance from the dual mission essential sensors. Lightning tests were conducted on the DFCS in the laboratory in order to determine susceptibility and to demonstrate operational immunity. Flight testing was performed on the DFCS in a YA-7D aircraft.

A description of the system architecture and redundancy management approach used on the DIGITAC II Flight Control Program is presented in this paper. Also described are some of the problems encountered in implementing these techniques.

File Size: 627K
Product Status: In Stock

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