New Monolithics Shape the Future Mil-Std-1553 to 1750a Interfaces

Document Number: 860836

Date Published: April 1986

Author(s):
Steven N. Friedman - ILC Data Device Corp.

Abstract:
This paper describes the performance, physical and electrical characteristic of a MIL-STD-1553 to MIL-STD-1750A Computer Interface. The BUS-65600, Dual Redundant Remote Terminal Unit (RTU), Bus Controller (BC) and Bus Monitor (MT), along with the BUS-66300 Microprocessor Interface Unit are the main building blocks. This combination will support the Fairchild F9450A or McDonnell Douglas (MDAC-281) MIL-STD-1750A Computers. They will also interface with any sixteen bit microprocessor with a minimum of support circuitry. Refer to Figure 1, RTU/BC/MT, MIL-STD-1553 to MIL-STD-1750A Computer Interface.

The custom monolithic LSI components used in these special Superhybrids will be discussed. An explanation of the special shared Dual Access Memory approach will be included. This discussion will show how a dedicated memory can off-load the host CPU and fully support all 1553 transfers.

The BUS-65600 Superhybrid and BUS-66300 Memory I/O combination, has special hardware and software programming features which will be highlighted by block diagrams. This will provide an understanding as to how MIL-STD-1750A and other computers can be interfaced to a MIL- STD-1553 Data Bus.

File Size: 547K
Product Status: In Stock

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