System design is moving from a trial-and-error manual process towards a more rigorous and tool-supported approach. The forcing function for this move is the need to develop new products quickly, correctly and inexpensively. Time-to- market of four to six months are not uncommon today for some electronic systems. At the same time there is a need to leverage maximally what Deep Sub-Micron (DSM) technology has to offer to compete. Hence an approach that has design re- use as its main goal has great potential to increase productivity of the industry as a whole. The basic tenets of the design methodology incorporated into the Cadence Virtual Component Co-Design (VCC) Environment are function- architecture co-design, mapping of functions to flexible and programmable architectures, and efficient and automatic implementation of actual code on the programmable components of the architecture. We illustrate these principles and the capabilities of the tool using the "assumed convergence'' of a classical automotive power window controller and a GSM cell-phone design as an example. We show how it has been possible to capture functions and candidate architectures and how the mapping of the functions to the candidate architectures can be carried out very quickly so as to converge to an "optimal'' solution effectively and in a small number of iterations. A few of these architectures can be evaluated using the estimation and modeling technology inserted in the Cadence VCC Environment.