Browse Publications Technical Papers 2004-01-0904
2004-03-08

A PC and FPGA Hybrid Approach to Hardware-in-the-Loop Simulation 2004-01-0904

ECU designers are seeking more flexibility from HIL test systems. Often their needs are met by the development of custom hardware, either internally or by HIL test system vendors. Many systems also rely heavily on the use of multiple expensive microprocessors to achieve the required timing and synchronization performance. This paper discusses an alternative based on PC technology and reconfigurable I/O hardware. The HIL test system designer uses a graphical programming interface to reconfigure not only the real-time software portion of the system, but also the FPGA-based I/O hardware. This increases flexibility and lowers cost by providing capabilities such as generating simulated outputs synchronized to crank angle and implementing multiple serial communication protocols.

SAE MOBILUS

Subscribers can view annotate, and download all of SAE's content. Learn More »

Access SAE MOBILUS »

Members save up to 43% off list price.
Login to see discount.
Special Offer: With TechSelect, you decide what SAE Technical Papers you need, when you need them, and how much you want to pay.
X