Virtual Engine System Prototyping with High-Resolution FFT for Digital Knock Detection Using CPU Model-Based Hardware/Software Co-simulation 2009-01-0532
We have developed a full virtual engine system prototyping platform with 4-cylinder engine plant model, SH-2A CPU hardware model, and object code level software including OSEK OS. The virtual engine system prototyping platform can run simulation of an engine control system and digital knock detection system including 64-pt FFT computations that provide required high-resolution DSP capability for detection and control. To help the system design, debugging, and evaluation, the virtual system prototyping consists of behavior analyzer which can provide the visualization of useful CPU internal information for control algorithm tuning, RTOS optimization, and CPU architecture development. Thus the co-simulation enables time and cost saving at validation stage as validation can be performed at the design stage before production of actual components.
Citation: Sugure, Y., Oho, S., Phatak, S., and Saikalis, G., "Virtual Engine System Prototyping with High-Resolution FFT for Digital Knock Detection Using CPU Model-Based Hardware/Software Co-simulation," SAE Int. J. Passeng. Cars – Electron. Electr. Syst. 2(1):177-185, 2009, https://doi.org/10.4271/2009-01-0532. Download Citation
Yasuo Sugure, Shigeru Oho, Sujit S. Phatak, George Saikalis
Hitachi, Ltd., Hitachi America, Ltd.
SAE World Congress & Exhibition
SAE International Journal of Passenger Cars - Electronic and Electrical Systems-V118-7, SAE International Journal of Passenger Cars - Electronic and Electrical Systems-V118-7EJ