Powering Navigation Systems with SMP-Based Multicore Engine 2009-01-1480
Car navigation systems are evolving to support a host of new functions, including vehicle location and navigation capabilities, and are fast becoming the brain of the car, where entertainment, safety and autonomous driving converge. Increased functionalities require higher- performance processors—and studies have shown that as operating frequency increases to provide higher performance, power consumption drastically increases. Further, as semiconductor technologies move to smaller process nodes to achieve higher performance, operating and leakage power also increase due to the low voltage-threshold (VT) transistors and high operating voltages. As a result, the need for thermal dissipation becomes a bottleneck in high-frequency silicon designs. To support the requirements of these emerging navigational hubs, OEMs are requiring electronic components that offer greater functionality while consuming little power.
This paper will describe a single-chip system LSI solution optimized with a symmetric multicore processor (SMP) to support the high-performance needs of evolving automotive navigational systems. The new device uses a parallel-processing approach that enables navigation systems to execute up to approximately 2000 MIPS at clock speeds under 400 MHz using 5W or less of power. An integrated high-performance graphics core that can render up to 13 million polygons per second also enables these systems to display high-quality 2D, 2.5D and 3D images for travel routes, road conditions and one-segment broadcasts on multiple screens simultaneously. Device features and design innovations that led to improved performance and low power consumption will also be explained.