Browse Publications Technical Papers 2014-36-0297

The Use of Advanced Silicon CMOS Transistor as Hardness-By-Design Technique to Improve Radiation Tolerance for Integrated Circuits Dedicated to Space Applications 2014-36-0297

The detailed study of cosmic ray's influence is recent, as well as the invention of the transistor. Ionizing particles from space that focus on silicon integrated circuits (IC) can cause many undesirable effects.
These particles are mainly from solar activity, and can be classified into two basic groups: charged particles, e.g, electrons, protons or heavy ions, and electromagnetic radiation (photons), as X-rays, Gamma -rays, or Ultraviolet (UV) light. When they collide in an IC, these energetic particles cause a current pulse, which can affect the correct functioning of the device.
These electronic circuits have become increasingly susceptible to the effects of radiation, due to miniaturization, thus increasing the incidence of failures. In this sense many researches are being conducted in order to develop integrated devices tolerant to radiation and can benefit satellite development, military security systems, medical and transportation, usually different materials or process are adopted in order to mitigate the radiation effects, but these techniques increase the transistor's final cost.
Currently the researchers are adopting the Hardness-By-Design (HBD) technique to increase transistors tolerance by changing only transistor's layout. New semiconductors such as enclosed transistor (ELT) or dummy gate transistors (DGA) arise as a HBD option but with a large area consumption. Whereas with the advent of the new advanced transistor with octagonal style, the HBD requirements is achieved without any extra cost on the manufactures process and with die area reduction when compared with the standard device (rectangular style).


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