In-vehicle network communication is evolving faster speeds and higher performance capabilities, connecting the information possessed by ECU and sensors with the in-vehicle electronic systems which are continuing to develop. With the evolution of the complicated networks, it is becoming difficult to develop them without many verification of actual machine. On the other hand, as for the verification means required at the logic level or physical level for a network verification through ECU design, virtual verification in the whole vehicle is difficult due to speed increases and the sheer size of the system. Therefore, it is only applicable for systems which are limited to a domain or an area, and flexible and timely utilization would be difficult due to the changes in specifications. Our approach to provide for the further advancement of the electronics design is to build a simulation environment for the network topology verification with a physical layer and a network layer in the OSI reference model. This paper will explain the verification technique of the bus load in the network layer and the ringing in the physical layer used to arrive at the recommended in-vehicle network topology.