SAE ARP6338: Process for Assessment and Mitigation of Early Wearout of Life-limited Microcircuits 2019-01-1254
This paper describes a reliability physics analysis (RPA) process to assess the potential for early wearout of life-limited microcircuits (LLM).
As microcircuit feature sizes (gate length, line width, etc.) become smaller due to technological progress, the times required for wearout to occur become shorter. If those times are shorter than the required lifetimes of the microcircuits in their applications, they are referred to as LLM.
The aerospace industry has addressed the LLM issue by conducting research, and publishing SAE ARP 6338, which describes a process to identify and mitigate effects of LLM in complex CMOS devices with feature sizes of 50 nm or smaller; and also for other devices where the applied voltage is relatively large, and the feature sizes are relatively small.
The automotive industry now becoming aware of the LLM issue; and has access to microcircuits that are designed and produced according to AEC standards, and therefore the LLM issue can be addressed by the microcircuit producers.
SAE ARP 6338 is applicable to estimating expected lifetimes of LLM, with respect to wearout mechanisms that are (1) likely to occur in microcircuits integrated into aerospace, automotive, defense, and other high performance (AADHP) systems and equipment; (2) likely to occur within the LLM, as opposed to the packaging, and (3) within the ability of the microcircuit integrator to influence through system or equipment design, operation, or maintenance. The four major mechanisms that fit these criteria are:
1. Time-dependent-dielectric breakdown (TDDB);
2. Hot carrier injection (HCI);
3. Negative bias temperature instability (NBTI); and
4. Electromigration (EM).