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Software complexity of vehicles is constantly growing especially with additional autonomous driving features being introduced. This increases the risk for bugs in the system, when the car is delivered. According to a car manufacturer, more than 90% of availability problems corresponding to Electronic Control Unit (ECU) functionality are either caused by software bugs or they can be resolved by applying software updates to overcome hardware issues. The main concern are sporadic errors which are not caught during the development phase since their trigger condition is too unlikely to occur or is not covered by the tests. For such systems, there is a need of safe and secure infield diagnosis. In this paper we present a tool software architecture with remote access, which facilitates standard read/write access, an efficient channel interface for communication and file I/O, and continuous trace.

The current automotive electronic and electrical (EE) architecture has reached a scalability limit and in order to adapt to the new and upcoming requirements, novel automotive EE architectures are currently being investigated to support: a) an Ethernet backbone, b) consolidation of hardware capabilities leading to a centralized architecture from an existing distributed architecture, c) optimization of wiring to reduce cost, and d) adaptation of service-oriented software architectures. These requirements lead to the development of Zonal EE architectures as a possible solution that require appropriate adaptation of used security mechanisms and the corresponding utilized hardware trust anchors. 1 The current architecture approaches (ECU internal and in-vehicle networking) are being pushed to their limits, simultaneously, the current embedded security solutions also seem to reveal their limitations due to an increase in connectivity.

Autonomous driving systems and connected mobility are the next big developments for the car manufacturers and their suppliers during the next decade. To achieve the high computing power needs and fulfill new upcoming requirements due to functional safety and security, heterogeneous processor architectures with a mixture of different core architectures and hardware accelerators are necessary. To tackle this new type of hardware complexity and nevertheless stay within monetary constraints, high performance computers, inspired by state of the art data center hardware, could be adapted in order to fulfill automotive quality requirements. The European Processor Initiative (EPI) research project tries to come along with that challenge for next generation semiconductors. To be as close as possible to series development needs for the next upcoming car generations, we present a hybrid semiconductor system-on-chip architecture for automotive.

Advanced safety features and new services in connected cars depend on the security of the underlying vehicle functions. Due to the interconnection with the outside world and as a result of being an embedded system a modern vehicle is exposed to both, malicious activities as faced by traditional IT world systems as well as physical attacks. This introduces the need for utilizing hardware-assisted security measures to prevent both kinds of attacks. In this paper we present a survey of the different classes of hardware security devices and depict their different functional range and application. We demonstrate the feasibility of our approach by conducting a case study on an exemplary implementation of a function-on-demand use case. In particular, our example outlines how to apply the different hardware security approaches in practice to address real-world security topics. We conclude with an assessment of today’s hardware security devices.

The automotive industry experiences a major change as vehicles are gradually becoming a part of the Internet. Security concepts based on the closed-world assumption cannot be deployed anymore due to a constantly changing adversary model. Automotive Ethernet as future in-vehicle network and a new E/E Architecture have different security requirements than Ethernet known from traditional IT and legacy systems. In order to achieve a high level of security, a new multi-layer approach in the vehicle which responds to special automotive requirements has to be introduced. One essential layer of this holistic security concept is to restrict non-authorized access by the deployment of embedded firewalls. This paper addresses the introduction of automotive firewalls into the next-generation domain architecture with a focus on partitioning of its features in hardware and software.

Introduction The introduction of Ethernet and Gigabit Ethernet [2] as the main invehicle network infrastructure is the technical foundation for different new functionalities such as piloted driving, minimizing the CO2- footprint and others. The high data rate of such systems influences also the used microcontrollers due the fact that a big amount of data has to be transferred, encrypted, etc. Figure 1 Motivation - Vehicles will become connected to uncontrolled networks The usage of Ethernet as the in-vehicle-network enables the possibility that future road vehicles are going to be connected with other vehicles and information systems to improve system functionality. These previously closed automotive systems will be opened up for external access (see Figure 1). This can be Car2X connectivity or connection to personal devices. Allowing vehicle systems to communicate with other systems that are not within their physical boundaries impose a previously non-existing security problem.

The constant motivation for lower fuel consumption and emission levels has always been in the minds of most auto makers. Therefore, it is important to have precise control of the fuel being delivered into the engine. Gasoline Port fuel injection has been a matured system for many years and cars sold in emerging markets still favor such system due to its less system complexity and cost. This paper will explain injection control strategy of today during development, and especially the injector dead-time compensation strategy in detail and how further improvements could still be made. The injector current profile behavior will be discussed, and with the use of minimum hardware electronics, this paper will show the way for a new compensation strategy to be adopted.

The standard ISO 26262 stipulates a “top-down” approach based on the process “V” model, by conducting a hazard analysis and risk assessment to determine the safety goals, and subsequently derives the safety requirements down to the appropriate element level. The specification of safety goals is targeted towards identified hazardous events, whereas the classification of safety requirements does not always turn out non-ambiguous. While requirement formalization turns out to be advantageous, the translation from natural language to semi-formal requirements, especially in context of ISO 26262, poses a problem. In this publication, a new approach for the formalization of safety requirements is introduced, targeting the demands of safety standard ISO 26262. Its part 8, clause 6 (“Specification and management of safety requirements”) has no dedicated work product to accomplish this challenging task.

This paper discusses the RDC method utilizing delta-sigma analog-to-digital converter hardware module (DSADC) integrated in the Infineon's microcontroller family. With its higher resolution capability when compared to the regularly used ADC with successive-approximation (SAR), DSADC seems to have more potential. On the other hand, DSADC's inherent properties, such as asynchronous sampling rate and group delay, which when not handled properly, would have negative effects to the rotor positioning system. The solution to overcome those side-effects involves utilization of other internal microcontroller's resources such as timers and capture units, as well as additional software processing run inside CPU. The rotor positioning system is first modeled and simulated in high-level simulation language environment (Matlab and Simulink) in order to predict the transient- and steady state behaviors. The group delay itself is obtained by simulating the model of DSADC module implementation.

Integration scenarios for ECU software become more complicated, as more constraints with regards to timing, safety and security need to be considered. Multi-core microcontrollers offer even more hardware potential for integration scenarios. To tackle the complexity, more and more model based approaches are used. Understanding the interaction between the different software components, not only from a functional but also from a timing view, is a key success factor for high integration scenarios. In particular for multi-core systems, an amazing amount of timing data can be generated. Usually a multi-core system handles more software functionality than a single-core system. Furthermore, there may be timing interference on the multicore systems, due to the shared usage of buses, memory banks or other hardware resources.

The electrification of the powertrain is still one of the main challenges and innovation drivers for modern cars. With the introduction of the Toyota Prius, launched in Japan in 1997 the first commercially available hybrid car in mass production, the development continued towards the BMW i3 launched in July 2013. One main component for all kind of hybrid cars is still the power semiconductor, which is used for DC/DC converters and for the inverter to drive the electric motor for the traction control. What makes the selection of the right power semiconductor complex, is the variety of different voltage levels within the car (from standard 12V board net, the new 48V board net all the way up to 400V and above) plus different requirements in terms of switching and conduction performance, or accordingly power losses. The selection of device by application and voltage will be discussed in this paper.

The increasingly stringent requirements in relation to emission reduction and onboard diagnostics are pushing the Chinese automotive industry toward more innovative solutions and a rapid increase in electronic control performance. To manage the system complexity the architecture will require being well structure on hardware and software level. The paper introduces GEMS-K1 (Gasoline Engine Management System - Kit 1). GEMS-K1 is a platform being compliant with Euro IV emission regulation for gasoline engines. The application software is developed using modeling language, the code is automatically generated from the model. The driver software has a well defined structure including microcontroller abstraction layer and ECU abstraction layer. The hardware is following design rules to be robust, 100% testable and easy to manufacture. The electronic components use the latest innovation in terms of architecture and technologies.

More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers with incredible levels of peripheral integration. As a result, performance can no longer be measured in MIPS (Millions of Instructions Per Second). A microcontroller's effectiveness is based on coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, the designer needs benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment.

This paper will give an overview of multicore in automotive applications, covering the trends, benefits, challenges, and implementation scenarios. The automotive silicon industry has been building multicore and multiprocessor systems for a long time. The reasons for this choice have been: increased performance, safety redundancy, increased I/O & peripheral, access to multiple architectures (performance type e.g. DSP) and technologies. In the past, multiprocessors have been mainly considered as multi-die, multi-package with simple interconnection such as serial or parallel busses with possible shared memories. The new challenge is to implement a multicore, micro-processor that combines two or more independent processors into a single package, often a single integrated circuit (IC). The multicores allow a computing device to exhibit some form of thread-level parallelism (TLP).

Today the majority of power electronics is developed based on the requirements set by the main fields of application e.g. power generation, power supply, industrial drive and traction. With introduction to automotive applications new requirements have to be taken into account. This paper discusses how interconnection technologies for power semiconductors can be improved to meet the demand for higher temperature capability in HEV applications.

More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers whose performance can no longer be measured in MIPS. Instead, their effectiveness is based on a coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, what the designer needs are benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment. This presentation will explore the role of new benchmarks in the development of complex automotive applications.

Automotive powertrain and safety systems under design today are highly complex, incorporating more than one CPU core, running with more than 100 MHz and consisting of several 10 million transistors. Software complexity increases similarly making new methodologies and tools mandatory to manage the overall system. The use of accurate virtual prototypes improves the quality of systems with respect to system architecture design and software development. This approach is demonstrated with the example of the PCP/GPTA subsystem for Infineon's AUDO-NG powertrain controllers.

Infineon's latest high-end automotive microcontrollers like TC1796 are complex Systems On Chip (SoC) with two processor cores and up to two internal multi-master buses. The complex interaction between cores, peripherals and environment provides a big challenge for debugging. For mission critical control like engine management the debugging approach must not be intrusive. The provided solution are dedicated Emulation Devices which are able to deal with several 10 Gbit/s of raw internal trace data with nearly no cost adder for mass production and system design. Calibration, which is used later in the development cycle, has different requirements, but is covered by the Emulation Devices as well. The architecture of TC1796ED comprises the unchanged TC1796 silicon layout, extended by a full In-Circuit Emulator (ICE) and calibration overlay memory on the same die. In most cases, the only debug/calibration tool hardware needed is a USB cable.

As the demand for enhanced comfort, safety and differentiation with new features continues to grow and as electronics and software enable most of these, the number of electronic units or components within automobiles will continue to increase. This will increase the overall system complexity, specifically with respect to the number of controller actuators such as e-motors. However, hard constraints on cost and on physical boundaries such as maximum power dissipation per unit and pin-count per unit/connector require new solutions to alternative system partitioning. Vehicle manufacturers, as well as system and semiconductor suppliers are striving for increased scalability and modularity to allow for most cost optimal high volume configurations while featuring platform reuse and feature differentiation. This paper presents new semiconductor based approaches with respect to technologies, technology mapping and assembly technologies.

This paper will outline the results of a study performed to analyze the market introduction of x-by-wire applications in the context of weak global industry environment, technological and legislative challenges, standardization issues and end customer benefits. This paper attempts to provide a bird-view on influence factors and impacts for the x-by-wire market, including e.g. the end customer's acceptance and legal environment driving further development in specific areas. Further, major driving forces on semiconductor/component level will be outlined regarding e.g. pin-count, computation performance and heat dissipation, but also possible scenarios and solutions towards safe and efficient system design and partitioning.