Refine Your Search

Search Results

Viewing 1 to 2 of 2
Technical Paper

Power Plant Model of Fuel Consumption and Vibration for Vehicle Concept Planning

It is important for vehicle concept planning to estimate fuel economy and the influence of vehicle vibration in advance. This can be accomplished using virtual engine specifications and a virtual vehicle frame. In this paper, I will show the power plant model with electric starter and battery that can predict fuel economy, combustion heat results and transient torque. The power plant is a 1.3L 4cyl designed for NA Spark Ignition. The power plant model was realized using an energy based model using VHDL-AMS. Here, VHDL-AMS is modeling language stored in IEC international standard (IEC61691-6) and can realize multi physics in 1D simulation. The modeling language supports electrical, magnetic, thermal, mechanical, fluidic and compressive fluidic domains. The model was created in house using VHDL-AMS and validated on ANSYS SIMPLORER. The simulated results of fuel energy consumption agreed with driving energy and amount of energy losses, e.g. cooling loss, exhaust loss.
Technical Paper

Development of a Smart Analog Integrated Circuit for Electronic Control of an Automotive Variable Power-Steering System

A smart analog integrated circuit (IC) is developed for use in an electronic control unit for an automotive variable power-steering system. This IC accepts a vehicle speed signal as its input, performs signal processings such as frequency to voltage conversion and function generation, and then as its output generates a pulse width modulated (PWM) signal whose duty corresponds precisely to a given piecewise linear function of the vehicle speed. The PWM output is used as a driving signal to a power MOSFET for the actuation and control of a linearly variable solenoid valve to vary the force needed for steering effort in a prescribed relation to the vehicle speed. The IC is fabricated by monolithic bipolar integrated circuit technology and has about 750 device elements in a chip size of 5.7 by 3.1 mm2. It is enveloped in a shrinked dual in-line package with 24 pins.