Search Results

This document applies to the development of Plans for integrating and managing electronic components in equipment for the military and commercial aerospace markets; as well as other ADHP markets that wish to use this document. Examples of electronic components, as described in this document, include resistors, capacitors, diodes, integrated circuits, hybrids, application specific integrated circuits, wound components, and relays. It is critical for the Plan owner to review and understand the design, materials, configuration control, and qualification methods of all “as-received” electronic components, and their capabilities with respect to the application; identify risks, and where necessary, take additional action to mitigate the risks. The technical requirements are in Clause 3 of this standard, and the administrative requirements are in Clause 4.

This document applies to the development of Plans for integrating and managing COTS assemblies in electronic equipment and Systems for the commercial, military, and space markets; as well as other ADHP markets that wish to use this document.

This document describes a process for use by ADHP integrators of EEE parts and sub-assemblies (items) that have been targeted for other applications. This document does not describe specific tests to be conducted, sample sizes to be used, nor results to be obtained; instead, it describes a process to define and accomplish application-specific qualification; that provides confidence to both the ADHP integrators, and the integrators’ customers, that the item will performs its function(s) reliably in the ADHP application.

Development of a new Industry Standard related to GIDEP Reporting.

This ARP is not a certification document; it contains no certification requirements beyond those already contained in existing certification documents. The purpose of this ARP is to provide more detailed descriptions of the 12 hardware-related COTS issues listed in Appendix B, and to provide recommendations on existing practices, processes, and methods to address them. This ARP also describes artifacts that may be used as evidence that the issues have been addressed. The recommended practices and artifacts may be used to facilitate communication between, for example, the provider and the user of the avionics systems into which COTS components are integrated, or between the applicant for certification and the certification body. This ARP does not claim that the recommended practices and artifacts described in this ARP are the only acceptable ones.

This document applies to the development of Plans for integrating and managing COTS assemblies in electronic equipment and Systems for the commercial, military, and space markets; as well as other ADHP markets that wish to use this document. For purposes of this document, COTS assemblies are viewed as electronic assemblies such as printed wiring assemblies, relays, disk drives, LCD matrices, VME circuit cards, servers, printers, laptop computers, etc. There are many ways to categorize COTS assemblies1, including the following spectrum: At one end of the spectrum are COTS assemblies whose design, internal parts2, materials, configuration control, traceability, reliability, and qualification methods are at least partially controlled, or influenced, by ADHP customers (either individually or collectively). An example at this end of the spectrum is a VME circuit card assembly.

This document is intended for use by designers, reliability engineers, and others associated with the design, production, and support of electronic sub-assemblies, assemblies, and equipment used in AADHP applications to conduct lifetime assessments of microcircuits with the potential for early wearout; and to implement mitigations when required; and by the users of the AADHP equipment to assess those designs and mitigations. This document focuses on the LLM wearout assessment process. It acknowledges that the AADHP system design process also includes related risk mitigation and management; however, this document includes only high-level reference and discussion of those topics, in order to show their relationship to the LLM assessment process.

This document applies to the development of Plans for integrating and managing electronic components in equipment for the military and commercial aerospace markets; as well as other ADHP markets that wish to use this document. Examples of electronic components, as described in this document, include resistors, capacitors, diodes, integrated circuits, hybrids, application specific integrated circuits, wound components, and relays. It is critical for the Plan owner to review and understand the design, materials, configuration control, and qualification methods of all “as-received” electronic components, and their capabilities with respect to the application; identify risks, and where necessary, take additional action to mitigate the risks. The technical requirements are in Clause 3 of this standard, and the administrative requirements are in Clause 4.

This document describes a process for use by ADHP integrators of EEE parts and sub-assemblies (items) that have been targeted for other applications2. This document does not describe specific tests to be conducted, sample sizes to be used, nor results to be obtained; instead, it describes a process to define and accomplish application-specific qualification; that provides confidence to both the ADHP integrators, and the integrators’ customers, that the item will performs its function(s) reliably in the ADHP application.

This document prescribes processes for using semiconductor devices in wider temperature ranges than those specified by the device manufacturer. It applies to any designer or manufacturer of equipment intended to operate under conditions tht require semiconductor devices to function in temperature ranges beyond those for which the devices are marketed. This document is intended for applications in which only the performance of the device is an issue. Even though the device is used at wider temperatures, the wider temperatures will be limited to those that do not compromise the system performance or application-specific reliability of the device in the application. Specifically, this document is not intended for applications that require the device to function at an operating or environmental stress level that significantly increases the risk of catastrophic device failure, loss of equipment function, or unstable operation of the device.

This document is intended for use by designers, reliability engineers, and others associated with the design, production, and support of electronic sub-assemblies, assemblies, and equipment used in ADHP applications to conduct lifetime assessments of microcircuits with the potential for early wearout; and to implement mitigations when required; and by the users of the ADHP equipment to assess those designs and mitigations. This document focuses on the LLM wearout assessment process. It acknowledges that the ADHP system design process also includes related risk mitigation and management; however, this document includes only high-level reference and discussion of those topics, in order to show their relationship to the LLM assessment process.

This Standard applies to integrated circuits and semiconductors exhibiting the following attributes: a A minimum set of requirements, or information provided by the part manufacturer, which will allow a standard COTS component to be designated AQEC by the manufacturer. b As a minimum, each COTS component (designated AQEC) will have been designed, fabricated, assembled, and tested in accordance with the component manufacturer’s requirements for standard data book components. c Qualification of, and quality systems for, the COTS components to be designated as AQEC shall include the manufacturer’s standards, operating procedures, and technical specifications. d Components manufactured before the manufacturer has addressed AQEC requirements, but utilizing the same processes, are also considered AQEC compliant. e Additional desired attributes of a device designated AQEC (that will support AQEC users) are found in Appendix B of this standard.

This document applies to the development of Plans for integrating and managing COTS assemblies in electronic equipment and Systems for the commercial, military, and space markets; as well as other ADHP markets that wish to use this document. For purposes of this document, COTS assemblies are viewed as small electronic assemblies such as printed wiring assemblies, relays, disk drives, LCD matrices, VME circuit cards, servers, printers, laptop computers, etc. There are many ways to categorize COTS assemblies1, including the following spectrum: At one end of the spectrum are COTS assemblies whose design, internal parts2, materials, configuration control, and qualification methods are at least partially controlled, or influenced, by aerospace customers (either individually or collectively). An example at this end of the spectrum is a VME circuit card assembly.

This document applies to the development of Plans for integrating and managing electronic components in equipment for the military and commercial aerospace markets; as well as other ADHP markets that wish to use this document. Examples of electronic components, as described in this document, include resistors, capacitors, diodes, integrated circuits, hybrids, application specific integrated circuits, wound components, and relays. It is critical for the Plan owner to review and understand the design, materials, configuration control, and qualification methods of all “as-received” electronic components, and their capabilities with respect to the application; identify risks, and where necessary, take additional action to mitigate the risks. The technical requirements are in Clause 3 of this standard, and the administrative requirements are in Clause 4.

This Standard applies to integrated circuits and semiconductors exhibiting the following attributes: a A minimum set of requirements, or information provided by the part manufacturer, which will allow a standard COTS component to be designated AQEC by the manufacturer. b As a minimum, each COTS component (designated AQEC) will have been designed, fabricated, assembled, and tested in accordance with the component manufacturer’s requirements for standard data book components. c Qualification of, and quality systems for, the COTS components to be designated as AQEC shall include the manufacturer’s standards, operating procedures, and technical specifications. d Components manufactured before the manufacturer has addressed AQEC requirements, but utilizing the same processes, are also considered AQEC compliant. e Additional desired attributes of a device designated AQEC (that will support AQEC users) are found in Appendix B of this standard.