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Cyber security in the aviation industry, especially in relation to onboard aircraft systems, presents unique challenges in its implementation and management. The cyber threat model is constantly evolving and will continually present new and different challenges to the aircraft operator in responding to new cyber threats without either invoking a lengthy software update and re-certification process or limiting aircraft-to-ground communications to the threatened system or systems. This presentation discusses a number of system architectural options and developing technologies that could be considered to enhance the aircraft cyber protection and defensive capabilities of onboard systems as well as to minimize the effort associated with certification/re-certification. Some of these limit the aircraft?s vulnerabilities or in cyber terms, its ?threat surface?.

This presentation shows the SCADE System product line for systems modeling and generation based on the SysML standard and the Eclipse Papyrus open source technology. SCADE System has been developed in the framework of Listerel, a joint laboratory of Esterel Technologies, provider of the SCADE�, and CEA LIST, project leader of the Eclipse component, Papyrus. From an architecture point of view, the Esterel SCADE tools are built on top of the SCADE platform which includes both SCADE Suite�, a model-based development environment dedicated to critical software, and SCADE System enabling model-based system engineering. SCADE System includes Papyrus, an open source component (under EPL license), integrated in the modeling platform of Eclipse. Using this integrated modeling platform, both system and software teams share the same environment for system development. Furthermore, other model-based tools can be added to the environment, due to the use of Eclipse.

Secure software distribution in aviation context. Presenter David von Oheimb, Siemens AG

Given the fast changing market demands, the growing complexity of features, the shorter time to market, and the design/development constraints, the need for efficient and effective verification and validation methods are becoming critical for vehicle manufacturers and suppliers. One such example is fault-tree analysis. While fault-tree analysis is an important hazard analysis/verification activity, the current process of translating design details (e.g., system level and software level) is manual. Current experience indicates that fault tree analysis involves both creative deductive thinking and more mechanical steps, which typically involve instantiating gates and events in fault trees following fixed patterns. Specifically for software fault tree analysis, a number of the development steps typically involve instantiating fixed patterns of gates and events based upon the structure of the code. In this work, we investigate a methodology to translate software programs to fault trees.