Cost Efficient Partitioning for New Generation of Automatic Transmission Gearbox Controllers
This paper shall present advancements in electronic transmission control circuits addressing new challenges in the gearbox striving for improved vehicle efficiency and comfort of driving. Efficient chipset design, requires finding the optimal partitioning, that is the mapping of functionality to hardware or software and analog or digital circuit technology. The efficiency will be judged by minimal cost whilst achieving improved functionality and required scalability for a platform approach. Specific examples demonstrated are smart sensor architecture and new mapping of control strategies, realized with a novice integrated current control IC concept. Comparisons on system level are used to evaluate different function mappings as well as component partitioning. Details of the most optimized mapping and partitioning will be elaborated and first results of implementation in silicon components will be shown.