Browse Standards J2628_201307
Historical REVISED 2013-07-16

Characterization, Conducted Immunity J2628_201307

The methods included in this document are:
  1. a
    Voltage-Temperature Design Margins.
  2. b
    Voltage Interruptions and Transients.
  3. c
    Voltage Dropouts and Dips.
  4. d
    Current Draw Under a Number of Conditions.
  5. e
    Switch Input Noise
These methods are best applied during the Development stage but can be used at all stages (e.g., Pre-Qualification, Qualification or Conformity).
J2628_201806
2018-06-12
Latest
Stabilized
J2628_201307
2013-07-16
Historical
Revised
J2628_200707
2007-07-19
Historical
Revised
J2628_200504
2005-04-29
Historical
Revised
J2628_200208
2002-08-05
Historical
Issued

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