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The Integrated Modular Avionics (IMA) architecture has been a crucial concern for the aerospace industry in developing more complex systems, while seeking to reduce space, weight and power (SWaP), as well as development, certification and production time. From a software perspective, that objective pushes developers to migrate toward safety critical space and time partitioning environment. However, mainstream commercial real-time operating systems (RTOS) offering such partitioning can be restrictive in early development due to very high licensing costs. That situation is even more striking when considering that low-cost alternatives could instead be used for system modeling and early simulation before acquisition of a target platform. This paper reviews existing low-cost and open-source development environments to propose a novel design flow. The proposed methodology starts with model-based analysis in the AADL modeling language.

This paper presents a fault tolerant flight control design for the longitudinal linear model of the Boeing 737-100. The EMMAE (Extended Multiple Model Adaptive estimation) method is used to design the FDD process (Fault Detection and Diagnosis). Based essentially on a set of EKFs (Extended Kalman Filters), this method makes it possible to simulate several types of faults including stuck and oscillation. To develop the RFC (Reconfigurable Flight Control) law, SMC (Sliding Mode Control) method [11] is used. To rigorously investigate the performance of the overall system with respect of interactions between the two subsystems, The MRAC (Model Reference Adaptive Control) method [3] is used for comparison. Several simulation results using Matlab and Simulink show the desired system performance with fault compensation.

Design assurance guidance such as DO-254, and commercial off the shelf (COTS) increasing popularity in high critical mission have pushed the validation and verification methodologies to improve by integrating fault tolerance analysis in reliability assessment. A novel methodology for analysing the sensitivity of digital designs to single event upsets (SEU) is proposed. We first characterize basic combinational circuit models using fault injection via mutation technique at low level of abstraction. Error analysis is performed at primary outputs to identify patterns that are collected in a faulty behaviour library. This library is then used at a high level of abstraction to execute a sensitivity analysis on a digital design model. A reliability report is then generated showing the soft error rate (SER) and the benign errors count. We proved our methodology by analysing the radiation sensitivity of a discrete wavelet transform architecture using two different sets of data.