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This document applies to the development of Plans for integrating and managing electronic materials and processes for equipment in the military and commercial aerospace markets; as well as other ADHP markets that wish to use this document. Examples of electronic materials and processes, as described in this document, include soldering alloys, plating finishes, bulk metals, chassis materials and finishes, materials used for mechanical parts, etc. It is critical for the Plan owner to review and understand the properties and configuration control of all “as-received” or “off-the-shelf” electronic materials with respect to the application capabilities in order to identify risks, and where necessary, take additional action to mitigate the risks. The technical requirements are in Section 3 of this standard, and the administrative requirements are in Section 4.

This document is intended for use by designers, reliability engineers, and others associated with the design, production, and support of electronic sub-assemblies, assemblies, and equipment used in AADHP applications to conduct lifetime assessments of microcircuits with the potential for early wearout; and to implement mitigations when required; and by the users of the AADHP equipment to assess those designs and mitigations. This document focuses on the LLM wearout assessment process. It acknowledges that the AADHP system design process also includes related risk mitigation and management; however, this document includes only high-level reference and discussion of those topics, in order to show their relationship to the LLM assessment process.

This document is intended for use by designers, reliability engineers, and others associated with the design, production, and support of electronic sub-assemblies, assemblies, and equipment used in ADHP applications to conduct lifetime assessments of microcircuits with the potential for early wearout; and to implement mitigations when required; and by the users of the ADHP equipment to assess those designs and mitigations. This document focuses on the LLM wearout assessment process. It acknowledges that the ADHP system design process also includes related risk mitigation and management; however, this document includes only high-level reference and discussion of those topics, in order to show their relationship to the LLM assessment process.

This document defines the requirements for developing an Electronic Components Management Plan (ECMP), hereinafter also called the Plan, to assure customers and regulatory agencies that all of the electronic components in the equipment of the Plan owner are selected and applied in controlled processes compatible with the end application; and that the Technical Requirements detailed in clause 5.0 are accomplished. In general the owners of a complete Electronic Components Management Plan are avionics equipment manufacturers.

This document applies to the development of Plans for integrating and managing electronic components in equipment for the military and commercial aerospace markets; as well as other ADHP markets that wish to use this document. Examples of electronic components, as described in this document, include resistors, capacitors, diodes, integrated circuits, hybrids, application specific integrated circuits, wound components, and relays. It is critical for the Plan owner to review and understand the design, materials, configuration control, and qualification methods of all “as-received” electronic components, and their capabilities with respect to the application; identify risks, and where necessary, take additional action to mitigate the risks. The technical requirements are in Clause 3 of this standard, and the administrative requirements are in Clause 4.

This document applies to the development of Plans for integrating and managing electronic components in equipment for the military and commercial aerospace markets; as well as other ADHP markets that wish to use this document. Examples of electronic components, as described in this document, include resistors, capacitors, diodes, integrated circuits, hybrids, application specific integrated circuits, wound components, and relays. It is critical for the Plan owner to review and understand the design, materials, configuration control, and qualification methods of all “as-received” electronic components, and their capabilities with respect to the application; identify risks, and where necessary, take additional action to mitigate the risks. The technical requirements are in Clause 3 of this standard, and the administrative requirements are in Clause 4.

This Standard applies to integrated circuits and semiconductors exhibiting the following attributes: a A minimum set of requirements, or information provided by the part manufacturer, which will allow a standard COTS component to be designated AQEC by the manufacturer. b As a minimum, each COTS component (designated AQEC) will have been designed, fabricated, assembled, and tested in accordance with the component manufacturer’s requirements for standard data book components. c Qualification of, and quality systems for, the COTS components to be designated as AQEC shall include the manufacturer’s standards, operating procedures, and technical specifications. d Components manufactured before the manufacturer has addressed AQEC requirements, but utilizing the same processes, are also considered AQEC compliant. e Additional desired attributes of a device designated AQEC (that will support AQEC users) are found in Appendix B of this standard.

This document applies to the development of Plans for integrating and managing COTS assemblies in electronic equipment and Systems for the commercial, military, and space markets; as well as other ADHP markets that wish to use this document. For purposes of this document, COTS assemblies are viewed as small electronic assemblies such as printed wiring assemblies, relays, disk drives, LCD matrices, VME circuit cards, servers, printers, laptop computers, etc. There are many ways to categorize COTS assemblies1, including the following spectrum: At one end of the spectrum are COTS assemblies whose design, internal parts2, materials, configuration control, and qualification methods are at least partially controlled, or influenced, by aerospace customers (either individually or collectively). An example at this end of the spectrum is a VME circuit card assembly.

This document applies to the development of Plans for integrating and managing COTS assemblies in electronic equipment and Systems for the commercial, military, and space markets; as well as other ADHP markets that wish to use this document. For purposes of this document, COTS assemblies are viewed as electronic assemblies such as printed wiring assemblies, relays, disk drives, LCD matrices, VME circuit cards, servers, printers, laptop computers, etc. There are many ways to categorize COTS assemblies1, including the following spectrum: At one end of the spectrum are COTS assemblies whose design, internal parts2, materials, configuration control, traceability, reliability, and qualification methods are at least partially controlled, or influenced, by ADHP customers (either individually or collectively). An example at this end of the spectrum is a VME circuit card assembly.