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With the introduction of the ISO26262 automotive safety standard there is a burden of proof to show that the processing elements in embedded microcontroller hardware are capable of supporting a certain diagnostic coverage level, depending on the required Automotive Safety Integrity Level (ASIL). The current mechanisms used to provide actual metrics of the Built-in Self Tests (BIST) and Lock Step comparators use Register Transfer Level (RTL) simulations of the internal processing elements which force faults into individual nodes of the design and collect diagnostic coverage results. Although this mechanism is robust, it can only be performed by semiconductor suppliers and is costly. This paper describes a new solution whereby the microcontroller is synthesized into a large Field Programmable Gate Array (FPGA) with a test controller on the outside.

Developing automotive chassis applications is becoming increasingly complex due to cross-functional system interactions and the inherent safety critical nature of the systems involved. One consequence is the need for a rapid prototyping platform, targeted and tailored to meet the specific needs of the chassis domain. This paper describes an example of such an architecture for a chassis rapid prototyping system incorporating several Infineon TriCore embedded microcontrollers and Emulation Devices (ED), networked together by the Micro Link Interfaces (MLI). It also discusses how using such a development platform can lead to a significant reduction in the overall development time of a production intent chassis system.