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Journal Article

Car-to-X Simulation Environment for Comprehensive Design Space Exploration Verification and Test

2010-04-12
2010-01-0451
A future car-to-x communication system has to fulfil a lot of different requirements concerning high performance and functionality that are given by the field of application. To be able to optimize the system architecture regarding these constraints an intensive architecture evaluation and investigation is necessary. Within this paper a simulative approach for comprehensive design space exploration, verification, and test of a car-to-x communication unit is presented. The proposed simulation environment allows for a flexible adaption to the test case by being able to interconnect an arbitrary number of simulators of different type and different granularity. As a novelty complete embedded car-to-x systems can be investigated by integrating several SystemC based architecture models into an environmental simulation and observing their behavior and interaction.
Technical Paper

Standards for Electric/Electronic Components and Architectures

2008-10-20
2008-21-0022
To fulfil the increasing requirements of electric/electronic architectures in automotive environments new concepts for future Electronic Control Units (ECU) are needed. Novel architectures offer much higher potential in terms of performance compared to higher clock rates in standard microcontroller devices. The following contribution discusses the performance benefits of new concepts as well as advantages in early development phases. We focus on two systems: A central body controller and a gateway system. Both are realized on reconfigurable hardware. In comparison to microcontrollers the FPGA technology offers the opportunity of task parallelization and partial dynamically reconfiguration. These novel architectures demand new tool flows and standards which will be also addressed in this paper.
Technical Paper

Automatic Gateway Prototype Generation for Optimization of E/E-Architectures Based on High-Level Models

2011-04-12
2011-01-1029
To fulfil the increasing requirements of electric/electronic architectures in automotive environments new concepts for future Electronic Control Units (ECU) are needed. Novel hardware architectures offer much higher potential compared to standard microcontroller devices. In previous publications the advantages of modular gateway architectures over standard microcontroller solutions were shown, especially regarding performance, low latency times, busload independency and configurability. However developing hardware gateway configurations is neither convenient nor practical. But recent development showed a trend towards early e/e-architecture models in tools like PREEvision which are usually used for architecture exploration. In this contribution we demonstrate an approach that closes the gap between such modeling tools and the reconfigurable gateway architecture.
Technical Paper

Towards Fail-Operational Systems on Controller Level Using Heterogeneous Multicore SoC Architectures and Hardware Support

2018-04-03
2018-01-1072
In recent automotive systems, more and more applications are classified as safety related and hence are assigned an automotive safety integrity level (ASIL) according to ISO26262. Especially in the context of advanced driver assistance systems (ADAS) and automated driving, safety, reliability and availability requirements are ever increasing. In upcoming systems, a classical fail-safe design will not be sufficient in order to fulfill these requirements, and hence fail-operational systems will be essential. This holds especially true when it comes to automated driving levels 4 and 5. On the other hand, well-known approaches from the avionics industry are ill-suited for the use in automotive systems due to space, weight and power (SWAP) restrictions. This motivates the research on new, lightweight approaches for embedded fail-operational systems.
Technical Paper

Development of a Latency Optimized Communication Device for WAVE and SAE Based V2X-Applications

2016-04-05
2016-01-0150
Various algorithms such as emergency brake or crash warning using V2X communication have been published recently. For such systems hard real-time constraints have to be satisfied. Therefore latency needs to be minimized to keep the message processing delay below a certain threshold. Existing V2X systems based on the IEEE 1609 and SAE J2735 standards implement most message processing in software. This means the latency of these systems strongly depends on the CPU load as well as the number of incoming messages per time. According to safety constraints all messages of nearby vehicles have to be processed, whereby no prediction of the message importance can be given without analyzing the message content. Regarding the aforementioned requirements we propose a novel architecture that optimizes latency to satisfy the hard real-time constraints for V2X messages.
Journal Article

Model-Based Design of Service-Oriented Architectures for Reliable Dynamic Reconfiguration

2020-04-14
2020-01-1364
Service-oriented architectures (SOAs) are well-established solutions in the IT industry. Their use in the automotive domain is still on the way. Up to now, the automotive domain has taken advantage of service-oriented architectures only in the area of infotainment and not for systems with hard real-time requirements. However, applying SOA to such systems has just started but is missing suitable design and verification methodologies. In this context, we target to include the notion of model-based design to address fail-operational systems. As a result, a model-based approach for the development of fail-operational systems based on dynamic reconfiguration using a service-oriented architecture is illustrated. For the evaluation, we consider an example function of an automatically controlled braking system and analyze the reconfiguration time when the function fails.
Journal Article

Evaluation Methodologies in the Development of Dynamically Reconfigurable Systems in the Automotive Industry

2020-04-14
2020-01-1363
Classical decentralized architectures based on large networks of microprocessor-based Electronic Control Units (ECU), namely those used in self-driving cars and other highly-automated applications used in the automotive industry, are becoming more and more complex. These new, high computational power demand applications are constrained by limits on energy consumption, weight, and size of the embedded components. The adoption of new embedded centralized electrical/electronic (E/E) architectures based on dynamically reconfigurable hardware represents a new possibility to tackle these challenges. However, they also raise concerns and questions about their safety. Hence, an appropriate evaluation must be performed to guarantee that safety requirements resulting from an Automotive Safety Integrity Level (ASIL) according to the standard ISO 26262 are met. In this paper, a methodology for the evaluation of dynamically reconfigurable systems based on centralized architectures is presented.
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