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More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers with incredible levels of peripheral integration. As a result, performance can no longer be measured in MIPS (Millions of Instructions Per Second). A microcontroller's effectiveness is based on coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, the designer needs benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment.

More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers whose performance can no longer be measured in MIPS. Instead, their effectiveness is based on a coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, what the designer needs are benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment. This presentation will explore the role of new benchmarks in the development of complex automotive applications.

Infineon's latest high-end automotive microcontrollers like TC1796 are complex Systems On Chip (SoC) with two processor cores and up to two internal multi-master buses. The complex interaction between cores, peripherals and environment provides a big challenge for debugging. For mission critical control like engine management the debugging approach must not be intrusive. The provided solution are dedicated Emulation Devices which are able to deal with several 10 Gbit/s of raw internal trace data with nearly no cost adder for mass production and system design. Calibration, which is used later in the development cycle, has different requirements, but is covered by the Emulation Devices as well. The architecture of TC1796ED comprises the unchanged TC1796 silicon layout, extended by a full In-Circuit Emulator (ICE) and calibration overlay memory on the same die. In most cases, the only debug/calibration tool hardware needed is a USB cable.

In terms of modern technical systems, the automotive sector is characterized by escalating complexity and functionality requirements. The development of embedded control systems has to meet highest demands regarding process-, time- and cost-optimization. Hence, the efficiency of software development becomes a crucial competitive advantage. Systems design engineers need effective tools and methods to achieve exemplary speed and productivity within the development phase. To obtain such tools and methods, semiconductor manufacturers and tool manufacturers must work closely together. Within the joint efforts of ETAS and Infineon, the software tool suite ASCET-SD was enhanced to generate efficient C code for Infineon's TriCore architecture mapped on ETAS's real-time operating system ERCOSEK. The processor interface to application & calibration tools was realized using the ETK probe based on a JTAG/Nexus link at very high bandwidth.

The recent improvements in automotive electronics have had a tremendous impact on safety, comfort and emissions. But the continuous increase of the volume of electronic equipment in cars (representing more than 25% of purchasing volume) as well as the increasing system complexity represent a new challenge to quality, post-sales customer support and maintenance. Identifying a fault in a complex network of ECUs, where the different functions are getting more and more intricate, is not an easy task. It can be shown that with the levels of reliability common in 1980, an upper-range automobile of today could never function fault-free. On-Board-Diagnostics (OBD) concepts are emerging to assist the maintenance personnel in localizing the source of a problem with high accuracy, reducing the vehicle repair time, repair costs and costs of warranty claims.

Driver assistance systems (e.g. the emergency brake assist Active Brake Assist2, or ABA2 for short, in the Mercedes-Benz Actros) are becoming increasingly common in heavy-duty commercial vehicles. Due to the close interconnection with drivetrain and suspension control systems, the integration and validation of the functions make the most exacting demands on processes and tools involved in mechatronics development. In addition to a multi-stage test process focusing on the functions of the driver assistance systems (software), the “electrical” aspects (hardware) also form part of holistic maturity level validation. The test process is supported by state-of-the-art, high-performance tools (e.g. automatable component test benches and overall vehicle HiL systems) which, in particular, allow quick and accurate configuration in line with different vehicle variants.

Automotive powertrain and safety systems under design today are highly complex, incorporating more than one CPU core, running with more than 100 MHz and consisting of several 10 million transistors. Software complexity increases similarly making new methodologies and tools mandatory to manage the overall system. The use of accurate virtual prototypes improves the quality of systems with respect to system architecture design and software development. This approach is demonstrated with the example of the PCP/GPTA subsystem for Infineon's AUDO-NG powertrain controllers.

This paper will give an overview of multicore in automotive applications, covering the trends, benefits, challenges, and implementation scenarios. The automotive silicon industry has been building multicore and multiprocessor systems for a long time. The reasons for this choice have been: increased performance, safety redundancy, increased I/O & peripheral, access to multiple architectures (performance type e.g. DSP) and technologies. In the past, multiprocessors have been mainly considered as multi-die, multi-package with simple interconnection such as serial or parallel busses with possible shared memories. The new challenge is to implement a multicore, micro-processor that combines two or more independent processors into a single package, often a single integrated circuit (IC). The multicores allow a computing device to exhibit some form of thread-level parallelism (TLP).

In the next 20 years the share of small electric vehicles (SEVs) will increase especially in urban areas. SEVs show distinctive design differences compared to traditional vehicles. Thus the consequences of impacts of SEVs with vulnerable road users (VRUs) and other vehicles will be different from traditional collisions. No assessment concerning vehicle safety is defined for vehicles within European L7e category currently. Focus of the elaborated methodology is to define appropriate test scenarios for this vehicle category to be used within a virtual tool chain. A virtual tool chain has to be defined for the realization of a guideline of virtual certification. The derivation and development of new test conditions for SEVs are described and are the main focus of this work. As key methodology a prospective methodical analysis under consideration of future aspects like pre-crash safety systems is applied.

The standard ISO 26262 stipulates a “top-down” approach based on the process “V” model, by conducting a hazard analysis and risk assessment to determine the safety goals, and subsequently derives the safety requirements down to the appropriate element level. The specification of safety goals is targeted towards identified hazardous events, whereas the classification of safety requirements does not always turn out non-ambiguous. While requirement formalization turns out to be advantageous, the translation from natural language to semi-formal requirements, especially in context of ISO 26262, poses a problem. In this publication, a new approach for the formalization of safety requirements is introduced, targeting the demands of safety standard ISO 26262. Its part 8, clause 6 (“Specification and management of safety requirements”) has no dedicated work product to accomplish this challenging task.

The increasing functionality and complexity of future electric/electronic architectures requires efficient methods and tools to support design decisions, which are taken in early development phases 6. For the past four years, a holistic approach for architecture development has been established at Mercedes-Benz Cars R&D department. At its core is a seamless design flow, including the conception, the analysis and the documentation for electric/electronic architectures. One of the actual challenges in the design of electric/electronic architectures concerns communication behavior and network topologies. The increasing data exchange between the ECUs creates high requirements for the networks. With the introduction of FlexRay 21 and Ethernet the automotive network architecture become a lot more heterogeneous. Especially gateways must fulfill many new requirements to handle the strict periodic schedule of FlexRay and the partly event-triggered communication on CAN-busses 23.

Software complexity of vehicles is constantly growing especially with additional autonomous driving features being introduced. This increases the risk for bugs in the system, when the car is delivered. According to a car manufacturer, more than 90% of availability problems corresponding to Electronic Control Unit (ECU) functionality are either caused by software bugs or they can be resolved by applying software updates to overcome hardware issues. The main concern are sporadic errors which are not caught during the development phase since their trigger condition is too unlikely to occur or is not covered by the tests. For such systems, there is a need of safe and secure infield diagnosis. In this paper we present a tool software architecture with remote access, which facilitates standard read/write access, an efficient channel interface for communication and file I/O, and continuous trace.