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In defining innovative and cost-effective chip sets for future automotive applications, system architects need high-level tools that allow them to rapidly determine the best silicon partitioning for a given application in terms of system performance as well as cost. The tool needs to be flexible, modular, and swift such that the system designer can perform abstract simulation iterations quickly for various functional partitioning scenarios, without requiring excessive computer resources. The tool must also be portable and adaptable to provide a simulation environment suitable to systems- or car-manufacturers for in-depth applications simulation and architecture assessment. The semiconductor component definition process using such a “mission-level” design tool for the automotive application electronic valve will be demonstrated. Methods for the analysis of electronic valve control system architectures using mission-level simulation will be developed.

The increasing complexity of automotive electronic systems can only be managed by a higher integration of the modules and a high reliability of the individual electronic devices. That means, the number of electronic components on board will decrease and their complexity will increase. This paper describes how to meet the requirements for the power supply of a 32-bit microcontroller based system in an automotive environment.

This paper considers the verification of non-standard CAN network topologies of the physical layer at high speed transmission rate (500.0Kbps and 1.0Mbps). These network topologies including single star, multiple stars, and hybrid topologies (multiple stars in combination with linear bus or with ring topology) are simulated by using behavior modeling language (VHDL-AMS) in comparison to measurement. Throughout the verification process, CAN transceiver behavioral model together with other CAN physical layer simulation components have been proved to be very accurate. The modeling of measurement environment of the CAN network is discussed, showing how to get the measurement and simulation results well matched. This demonstrates that the simulation solution is reliable, which is highly desired and very important for the verification requirement in CAN physical layer design.

For the past approximately 20 years, the Serial Peripheral Interface (SPI) has been the established standard for serial communication between a host or central microprocessor and peripheral devices. This standard has been used extensively in control modules covering the entire spectrum of automotive applications, as well as non-automotive applications. As the complexity of engine control modules grows, with the number of vehicle actuators being controlled and monitored increasing, the number of loads the central microprocessor has to manage is growing accordingly. These loads are typically controlled using discrete and pulse-width modulated (PWM) outputs from the microcontroller when real-time operation is essential or via SPI when real-time response is not critical. The increase of already high pin-count on microcontrollers, the associated routing effort and demand for connected power stages is a concern of cost and reliability for future ECU designs.

A main challenge when developing next generation architectures for automated driving ECUs is to guarantee reliable functionality. Today’s fail safe systems will not be able to handle electronic failures due to the missing “mechanical” fallback or the intervening driver. This means, fail operational based on redundancy is an essential part for improving the functional safety, especially in safety-related braking and steering systems. The 2-out-of-2 Diagnostic Fail Safe (2oo2DFS) system is a promising approach to realize redundancy with manageable costs. In this contribution, we evaluate the reliability of this concept for a symmetric and an asymmetric Electronic Power Steering (EPS) ECU. For this, we use a Markov chain model as a typical method for analyzing the reliability and Mean Time To Failure (MTTF) in majority redundancy approaches. As a basis, the failure rates of the used components and the microcontroller are considered.

End of Line tests are brief set of tests intended to evaluate ECU's in order to ensure correct functioning of its intended functionality. As these tests are executed on the production line, available time to perform these tests is limited. On one hand, faster production demands require these tests and its framework to be designed in a time optimized manner. On the other hand, increase in ECU functionality translates to an increase in test's functional coverage, requiring more time. Therefore the time taken to execute the tests reaches a critical point in overall ECU production. Availability of multicore microcontrollers with increase in clock speed can increase the performance of end of line tests, but design challenges e.g. synchronization do not guarantee a linear performance increase. Therefore, design of test execution framework is absolutely critical to increase performance of test execution.

New generation microcontrollers for automotive applications require a huge number of I/Os, dealing with various sensor and actuator signals derived from the external world. In case of the first TriCore™ based 32-Bit microcontroller this leads to approximately 270 I/Os for signal processing. Adding the power supply lines and thermal balls, the overall number of required interconnects grows far over 300. To outperform standard microcontroller packages, e.g. QFPs, the limitations in terms of package size and maximum number of interconnects have to be improved. Main goal is to adapt the component quality to the high level reliability standard, which is the basis of an implementation into automotive parts. Current tests with a P-BGA standard package show interesting results for the board level reliability, when design and test parameters are changed only slightly.

Introduction The introduction of Ethernet and Gigabit Ethernet [2] as the main invehicle network infrastructure is the technical foundation for different new functionalities such as piloted driving, minimizing the CO2- footprint and others. The high data rate of such systems influences also the used microcontrollers due the fact that a big amount of data has to be transferred, encrypted, etc. Figure 1 Motivation - Vehicles will become connected to uncontrolled networks The usage of Ethernet as the in-vehicle-network enables the possibility that future road vehicles are going to be connected with other vehicles and information systems to improve system functionality. These previously closed automotive systems will be opened up for external access (see Figure 1). This can be Car2X connectivity or connection to personal devices. Allowing vehicle systems to communicate with other systems that are not within their physical boundaries impose a previously non-existing security problem.

This paper focuses on the requirements of electronic systems in automotive applications in terms of reliability and quality. As one of the most common devices in such applications for switching electronic loads, the power MOSFET, is investigated in detail. Today's qualification procedure for discrete devices according to AEC Q101 [1] will be explained and how this correlates to the stress of the device in the application. It will be pointed out what additional tests for “extended qualification” should be made to deal with critical failure modes reducing overly conservative safety margins and preventing excessive costs on the component side. The tests will be explained and the results presented.

Infineon's latest high-end automotive microcontrollers like TC1796 are complex Systems On Chip (SoC) with two processor cores and up to two internal multi-master buses. The complex interaction between cores, peripherals and environment provides a big challenge for debugging. For mission critical control like engine management the debugging approach must not be intrusive. The provided solution are dedicated Emulation Devices which are able to deal with several 10 Gbit/s of raw internal trace data with nearly no cost adder for mass production and system design. Calibration, which is used later in the development cycle, has different requirements, but is covered by the Emulation Devices as well. The architecture of TC1796ED comprises the unchanged TC1796 silicon layout, extended by a full In-Circuit Emulator (ICE) and calibration overlay memory on the same die. In most cases, the only debug/calibration tool hardware needed is a USB cable.

In terms of modern technical systems, the automotive sector is characterized by escalating complexity and functionality requirements. The development of embedded control systems has to meet highest demands regarding process-, time- and cost-optimization. Hence, the efficiency of software development becomes a crucial competitive advantage. Systems design engineers need effective tools and methods to achieve exemplary speed and productivity within the development phase. To obtain such tools and methods, semiconductor manufacturers and tool manufacturers must work closely together. Within the joint efforts of ETAS and Infineon, the software tool suite ASCET-SD was enhanced to generate efficient C code for Infineon's TriCore architecture mapped on ETAS's real-time operating system ERCOSEK. The processor interface to application & calibration tools was realized using the ETK probe based on a JTAG/Nexus link at very high bandwidth.

This paper will address the electronic development in the wireless industry and compare it to the electronic development in the automotive industry. The wireless industry is characterized by rapid, dramatic high tech changes with a less than two-year cycle time and an equivalent life cycle. The automotive electronics industry is working toward reducing the typical 2 to 3 year development cycle down 1 to 2 years but with a life cycle of 10 years or more. In addition to realizing the electronic development benefits seen in the wireless industry, the automotive industry places significantly more emphasis on the quality and reliability aspects of their designs as many of them are targeted toward, or interface with, safety critical applications. One of the lessons learned from the wireless industry is the development process; where the hardware selection process can be accomplished in a virtual environment in conjunction with concurrent software development.