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The increasingly stringent requirements in relation to emission reduction and onboard diagnostics are pushing the Chinese automotive industry toward more innovative solutions and a rapid increase in electronic control performance. To manage the system complexity the architecture will require being well structure on hardware and software level. The paper introduces GEMS-K1 (Gasoline Engine Management System - Kit 1). GEMS-K1 is a platform being compliant with Euro IV emission regulation for gasoline engines. The application software is developed using modeling language, the code is automatically generated from the model. The driver software has a well defined structure including microcontroller abstraction layer and ECU abstraction layer. The hardware is following design rules to be robust, 100% testable and easy to manufacture. The electronic components use the latest innovation in terms of architecture and technologies.

This paper presents a reliability study of a directly cooled IGBT module after a test drive of 85,000 Km in a fuel cell electric vehicle, as well as of an indirectly cooled IGBT module after a test drive of 200,000km in a hybrid car on public roads. At the end of the test drive, the inverter units were disassembled and analyzed with regard to the lifetime consumption. First, electrical measurements were carried out and the results were compared with the ones obtained directly after module production (End of Line test). After that, ultrasonic microscopy was performed in order to investigate any delamination in the solder layers. As a third step, an optical inspection was performed to monitor damages in the housing, formation of cracks or degradation of wire bonds. The results show none of the depicted failure modes could be found on the tested power modules after the field test. Obviously, no significant life time consumption could be observed.

Functional safe products conforming to the ISO 26262 standard are getting more important for automotive applications wherein electronic takes more and more response for safety relevant operations. Consequently safety mechanisms are needed and implemented in order to reach defined functional safety targets. To prove their effectiveness diagnostic coverage provides a measurable quantity. A straight forward safety mechanism for sensor systems can be established by redundant signal paths measuring the same physical quantity and subsequently performing an independent output difference-check that decides if the data can be transmitted or an error message shall be sent. This paper focuses on the diagnostic coverage figure calculation of such data correlation-checks for linear sensors which are also shown in ISO 26262 part5:2011 ANNEX D2.10.2.

As the demand for enhanced comfort, safety and differentiation with new features continues to grow and as electronics and software enable most of these, the number of electronic units or components within automobiles will continue to increase. This will increase the overall system complexity, specifically with respect to the number of controller actuators such as e-motors. However, hard constraints on cost and on physical boundaries such as maximum power dissipation per unit and pin-count per unit/connector require new solutions to alternative system partitioning. Vehicle manufacturers, as well as system and semiconductor suppliers are striving for increased scalability and modularity to allow for most cost optimal high volume configurations while featuring platform reuse and feature differentiation. This paper presents new semiconductor based approaches with respect to technologies, technology mapping and assembly technologies.

This paper shall present advancements in electronic transmission control circuits addressing new challenges in the gearbox striving for improved vehicle efficiency and comfort of driving. Efficient chipset design, requires finding the optimal partitioning, that is the mapping of functionality to hardware or software and analog or digital circuit technology. The efficiency will be judged by minimal cost whilst achieving improved functionality and required scalability for a platform approach. Specific examples demonstrated are smart sensor architecture and new mapping of control strategies, realized with a novice integrated current control IC concept. Comparisons on system level are used to evaluate different function mappings as well as component partitioning. Details of the most optimized mapping and partitioning will be elaborated and first results of implementation in silicon components will be shown.

The newly released Distributed System Interface 3 (DSI3) Bus Standard specification defines three modulation levels form which 16 valid symbols are coded. This complex structure is best decoded with symbol pattern recognition. This paper proposes a simplification of the correlation score calculation that sharply reduces the required number of operations. Additionally, the paper describes how the pattern recognition is achieved using correlation scores and a decoding algorithm. The performance of this method is demonstrated by mean of simulations with different load models between the master and the sensors and varying noise injection on the channel. We prove than the pattern recognition can decode symbols without any error for up to 24dBm.

This paper will address the electronic development in the wireless industry and compare it to the electronic development in the automotive industry. The wireless industry is characterized by rapid, dramatic high tech changes with a less than two-year cycle time and an equivalent life cycle. The automotive electronics industry is working toward reducing the typical 2 to 3 year development cycle down 1 to 2 years but with a life cycle of 10 years or more. In addition to realizing the electronic development benefits seen in the wireless industry, the automotive industry places significantly more emphasis on the quality and reliability aspects of their designs as many of them are targeted toward, or interface with, safety critical applications. One of the lessons learned from the wireless industry is the development process; where the hardware selection process can be accomplished in a virtual environment in conjunction with concurrent software development.

The recent improvements in automotive electronics have had a tremendous impact on safety, comfort and emissions. But the continuous increase of the volume of electronic equipment in cars (representing more than 25% of purchasing volume) as well as the increasing system complexity represent a new challenge to quality, post-sales customer support and maintenance. Identifying a fault in a complex network of ECUs, where the different functions are getting more and more intricate, is not an easy task. It can be shown that with the levels of reliability common in 1980, an upper-range automobile of today could never function fault-free. On-Board-Diagnostics (OBD) concepts are emerging to assist the maintenance personnel in localizing the source of a problem with high accuracy, reducing the vehicle repair time, repair costs and costs of warranty claims.

Multi-core systems are adopted quickly in the automotive domain, Proof of concepts have been implemented for power train, body and chassis, involving hard real-time constraints. However, depending on the degree of integration, it can be costly, especially in those cases where existing single-core software has to be migrated over. Furthermore, there seems to be a high level of uncertainty, whether a found solution, with regards to partitioning, mapping and orchestration of software is close to an optimum solution. Some integrated solutions demonstrate considerably less performance, for instance due to communication overhead compared to execution on single-core systems. This paper discusses a methodology, as to how to effectively and efficiently investigate the software architecture design space for multi-core software development.

Infineon's latest high-end automotive microcontrollers like TC1796 are complex Systems On Chip (SoC) with two processor cores and up to two internal multi-master buses. The complex interaction between cores, peripherals and environment provides a big challenge for debugging. For mission critical control like engine management the debugging approach must not be intrusive. The provided solution are dedicated Emulation Devices which are able to deal with several 10 Gbit/s of raw internal trace data with nearly no cost adder for mass production and system design. Calibration, which is used later in the development cycle, has different requirements, but is covered by the Emulation Devices as well. The architecture of TC1796ED comprises the unchanged TC1796 silicon layout, extended by a full In-Circuit Emulator (ICE) and calibration overlay memory on the same die. In most cases, the only debug/calibration tool hardware needed is a USB cable.

This paper focuses on the requirements of electronic systems in automotive applications in terms of reliability and quality. As one of the most common devices in such applications for switching electronic loads, the power MOSFET, is investigated in detail. Today's qualification procedure for discrete devices according to AEC Q101 [1] will be explained and how this correlates to the stress of the device in the application. It will be pointed out what additional tests for “extended qualification” should be made to deal with critical failure modes reducing overly conservative safety margins and preventing excessive costs on the component side. The tests will be explained and the results presented.

The powertrain module is being introduced to embedded System on Chips (SoCs) designed to increase available computational power. These high-performance SoCs have the potential to enhance the computational power along with providing on-board resources to support unexpected feature growth and on-demand customer requirements. This project will investigate the radial basis function (RBF) using the Gaussian process (GP) regression algorithm, the ETAS ASCMO tool, and the hardware accelerator Advanced Modeling Unit (AMU) being introduced by Infineon AURIX 2nd Generation. ETAS ASCMO is one of the solutions for data-driven modeling and model-based calibration. It enables users to accurately model, analyze, and optimize the behavior of complex systems with few measurements and advanced algorithms. Both steady state and transient system behaviors can be captured.

The German funded project ARAMiS included work on several demonstrators one of which was a multicore approach on large scale software integration (LSSI) for the automotive domain. Here BMW and Audi intentionally implemented two different integration platforms to gain both experience and real life data on a Hypervisor based concept on one side as well as using only native AUTOSAR-based methods on the other side for later comparison. The idea was to obtain figures on the added overhead both for multicore as well as safety, based on practical work and close-to-production implementations. During implementation and evaluation on one hand there were a lot of valuable lessons learned about multicore in conjunction with safety. On the other hand valuable information was gathered to make it finally possible to set up a cost model for estimation of potential overhead generated by different integration approaches for safety related software functions.

The verification of an in-vehicle network often requires to look at more than one level of abstraction at a time. At the moment, this is not addressed by existing methods, which are dedicated either to physical or application layer, but not both. This paper fills this gap by introducing a methodology to insert the protocol related software execution as well as the motor behavior into the physical layer mixed-signal (i.e. analog/digital) simulation. Electronics and mechanics are covered by the hardware description language VHDL-AMS, while the software is given in C.

Based on the example of a door soft close automatic the potential of integrated system simulation in the automotive systems development is demonstrated. The modeling approach is covering several physical domains like mechanics, electromagnetics and semiconductor physics. With adequate simplifying methods a time efficient model is generated, which allows system optimization in the concept phase. Time consuming redesigns can thus be minimized.

A variety of methodologies to use embedded multicore controllers efficiently has been discussed in the last years. Several assumptions are usually made in the automotive domain, such as static assignment of tasks to the cores. This paper shows an approach for efficient task allocation depending on different system modes. An engine management system (EMS) is used as application example, and the performance improvement compared to static allocation is assessed. The paper is structured as follows: First the control algorithms for the EMS will be classified according to operating modes. The classified algorithms will be allocated to the cores, depending on the operating mode. We identify mode transition points, allowing a reliable switch without neglecting timing requirements. As a next step, it will be shown that a load distribution by mode-dependent task allocation would be better balanced than a static task allocation.

This paper will give an overview of multicore in automotive applications, covering the trends, benefits, challenges, and implementation scenarios. The automotive silicon industry has been building multicore and multiprocessor systems for a long time. The reasons for this choice have been: increased performance, safety redundancy, increased I/O & peripheral, access to multiple architectures (performance type e.g. DSP) and technologies. In the past, multiprocessors have been mainly considered as multi-die, multi-package with simple interconnection such as serial or parallel busses with possible shared memories. The new challenge is to implement a multicore, micro-processor that combines two or more independent processors into a single package, often a single integrated circuit (IC). The multicores allow a computing device to exhibit some form of thread-level parallelism (TLP).

In recent years, we see more and more ECUs integrating a huge number of application software components. This process mostly results from the increasing amount of so called in-house software in various fields like electric-drive, chassis and driver assistance systems. The software development for these systems is partially moved from the supplier to the car manufacturers. Another important trend is the introduction of new network architectures intending to meet the growing communication requirements. For such ECUs the software integration scenarios become more complicated, as more quality of service requirements with regards to timing, safety and security need to be considered [2]. Multi-core microcontrollers offer even more potential variants for integration scenarios. Understanding the interaction between the different software components, not only from a functional, but also from a timing view, is a key success factor for modern electronic systems [6,7,8,9].

This paper considers the verification of non-standard CAN network topologies of the physical layer at high speed transmission rate (500.0Kbps and 1.0Mbps). These network topologies including single star, multiple stars, and hybrid topologies (multiple stars in combination with linear bus or with ring topology) are simulated by using behavior modeling language (VHDL-AMS) in comparison to measurement. Throughout the verification process, CAN transceiver behavioral model together with other CAN physical layer simulation components have been proved to be very accurate. The modeling of measurement environment of the CAN network is discussed, showing how to get the measurement and simulation results well matched. This demonstrates that the simulation solution is reliable, which is highly desired and very important for the verification requirement in CAN physical layer design.

This paper discusses the RDC method utilizing delta-sigma analog-to-digital converter hardware module (DSADC) integrated in the Infineon's microcontroller family. With its higher resolution capability when compared to the regularly used ADC with successive-approximation (SAR), DSADC seems to have more potential. On the other hand, DSADC's inherent properties, such as asynchronous sampling rate and group delay, which when not handled properly, would have negative effects to the rotor positioning system. The solution to overcome those side-effects involves utilization of other internal microcontroller's resources such as timers and capture units, as well as additional software processing run inside CPU. The rotor positioning system is first modeled and simulated in high-level simulation language environment (Matlab and Simulink) in order to predict the transient- and steady state behaviors. The group delay itself is obtained by simulating the model of DSADC module implementation.