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Journal Article

DSI3 Sensor to Master Decoder using Symbol Pattern Recognition

2014-04-01
2014-01-0252
The newly released Distributed System Interface 3 (DSI3) Bus Standard specification defines three modulation levels form which 16 valid symbols are coded. This complex structure is best decoded with symbol pattern recognition. This paper proposes a simplification of the correlation score calculation that sharply reduces the required number of operations. Additionally, the paper describes how the pattern recognition is achieved using correlation scores and a decoding algorithm. The performance of this method is demonstrated by mean of simulations with different load models between the master and the sensors and varying noise injection on the channel. We prove than the pattern recognition can decode symbols without any error for up to 24dBm.
Journal Article

The Challenges of Devising Next Generation Automotive Benchmarks

2008-04-14
2008-01-0382
More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers with incredible levels of peripheral integration. As a result, performance can no longer be measured in MIPS (Millions of Instructions Per Second). A microcontroller's effectiveness is based on coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, the designer needs benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment.
Technical Paper

The Challenges of Next Generation Automotive Benchmarks

2007-04-16
2007-01-0512
More than ever, microcontroller performance in cars has a direct impact on the driving experience, on compliance with improved safety, ever-stricter emissions regulations, and on fuel economy. The simple microcontrollers formerly used in automobiles are now being replaced by powerful number-crunchers whose performance can no longer be measured in MIPS. Instead, their effectiveness is based on a coherent partitioning between analog and digital, hardware and software, tools and methodology. To make an informed choice among the available devices, what the designer needs are benchmarks that are specific to automotive applications, and which provide a realistic representation of how the device will perform in the automotive environment. This presentation will explore the role of new benchmarks in the development of complex automotive applications.
Technical Paper

Non-standard CAN Network Topologies Verification at High Speed Transmission Rate using VHDL-AMS

2010-04-12
2010-01-0688
This paper considers the verification of non-standard CAN network topologies of the physical layer at high speed transmission rate (500.0Kbps and 1.0Mbps). These network topologies including single star, multiple stars, and hybrid topologies (multiple stars in combination with linear bus or with ring topology) are simulated by using behavior modeling language (VHDL-AMS) in comparison to measurement. Throughout the verification process, CAN transceiver behavioral model together with other CAN physical layer simulation components have been proved to be very accurate. The modeling of measurement environment of the CAN network is discussed, showing how to get the measurement and simulation results well matched. This demonstrates that the simulation solution is reliable, which is highly desired and very important for the verification requirement in CAN physical layer design.
Technical Paper

Embedded System Tool to Support Debugging, Calibration, Fast Prototyping and Emulation

2004-03-08
2004-01-0304
Infineon's latest high-end automotive microcontrollers like TC1796 are complex Systems On Chip (SoC) with two processor cores and up to two internal multi-master buses. The complex interaction between cores, peripherals and environment provides a big challenge for debugging. For mission critical control like engine management the debugging approach must not be intrusive. The provided solution are dedicated Emulation Devices which are able to deal with several 10 Gbit/s of raw internal trace data with nearly no cost adder for mass production and system design. Calibration, which is used later in the development cycle, has different requirements, but is covered by the Emulation Devices as well. The architecture of TC1796ED comprises the unchanged TC1796 silicon layout, extended by a full In-Circuit Emulator (ICE) and calibration overlay memory on the same die. In most cases, the only debug/calibration tool hardware needed is a USB cable.
Technical Paper

TTCAN from Applications to Products in Automotive Systems

2003-03-03
2003-01-0114
This paper outlines the results of a study performed to analyze the mission of TTCAN from applications to products for automotive systems. As commonly acknowledged communication is one of the key elements for future and even present systems such as an automobile. A dramatically increasing number of busses and gateways even in low- to midrange vehicles is putting significant burden upon the validation scenario as well as the cost. Accordingly, numerous new initiatives have been started worldwide in order to find solutions to this; some of them by the definition of enhanced or new protocols. This paper shall have a look particular on the new standard of TTCAN (time-triggered communication on CAN). This protocol is based on the CAN data link layer as specified in ISO 11898-1 and may use standardized CAN physical layers such as specified in ISO 11898-2 (high-speed transceiver) or in ISO 11898-3 (fault-tolerant low-speed transceiver).
Technical Paper

Timing Analysis and Tracing Concepts for ECU Development

2014-04-01
2014-01-0190
Integration scenarios for ECU software become more complicated, as more constraints with regards to timing, safety and security need to be considered. Multi-core microcontrollers offer even more hardware potential for integration scenarios. To tackle the complexity, more and more model based approaches are used. Understanding the interaction between the different software components, not only from a functional but also from a timing view, is a key success factor for high integration scenarios. In particular for multi-core systems, an amazing amount of timing data can be generated. Usually a multi-core system handles more software functionality than a single-core system. Furthermore, there may be timing interference on the multicore systems, due to the shared usage of buses, memory banks or other hardware resources.
Technical Paper

Microsecond Bus (μSB): The New Open-Market Peripheral Serial Communication Standard

2005-04-11
2005-01-0057
For the past approximately 20 years, the Serial Peripheral Interface (SPI) has been the established standard for serial communication between a host or central microprocessor and peripheral devices. This standard has been used extensively in control modules covering the entire spectrum of automotive applications, as well as non-automotive applications. As the complexity of engine control modules grows, with the number of vehicle actuators being controlled and monitored increasing, the number of loads the central microprocessor has to manage is growing accordingly. These loads are typically controlled using discrete and pulse-width modulated (PWM) outputs from the microcontroller when real-time operation is essential or via SPI when real-time response is not critical. The increase of already high pin-count on microcontrollers, the associated routing effort and demand for connected power stages is a concern of cost and reliability for future ECU designs.
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