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This document is an annex to EIA Engineering Bulletin SSB-1, Guidelines for Using Plastic Encapsulated Microcircuits and Semiconductors in Military, Aerospace and Other Rugged Applications (the latest revision). This document provides reference information concerning acceleration factors commonly used by device manufacturers to model failure rates in conjunction with statistical reliability monitoring. These acceleration factors are frequently used by OEMs in conjunction with physics of failure reliability analysis to assess the suitability of plastic encapsulated microcircuits and semiconductors for specific end use applications.

This Technical Bulletin covers the following areas of concern.

This document includes a standard set of management practices that can be used, or espoused, by the OEMs for use during the design and development of electronic systems to mitigate the effects of future Diminishing Manufacturing Sources and Material Shortages (DMSMS). While this document focuses primarily on microelectronic devices, the methods described here may also apply to other commodities.

This document is an annex to EIA Engineering Bulletin SSB-1, Guidelines for Using Plastic Encapsulated Microcircuits and Semiconductors in Military, Aerospace and Other Rugged Applications. This document provides reference information concerning the environmental stresses associated with tests specifically designed to apply to (or have unique implications for) plastic encapsulated microcircuits and semiconductors, and the specific failures induced by these environmental stresses.

This Engineering Bulletin and its annexes provide guidance to Original Equipment Manufacturers (OEMs) in evaluating device manufacturer flows and in selecting cost effective, standard products that meet the performance objective for potential use in many rugged, military, severe, or other environments.

This Engineering Bulletin and its annexes provide guidance to Original Equipment Manufacturers (OEMs) in evaluating device manufacturer flows and in selecting cost effective, standard products that meet the performance objective for potential use in many rugged, military, space, extreme, or other environments.

This document provides an industry standard for Long Term Storage (LTS) of electronic devices by drawing from the best long term storage practices currently known. LTS is defined as any device storage for more than 12 months but typically allows for much longer (years). While intended to address the storage of unpackaged semiconductors and packaged electronic devices, nothing in this standard precludes the storage of other items under the storage levels defined herein. This standard is not intended to address built-in failure mechanisms (e.g., tin whiskers, plating diffusion, and intermetallics) that would take place regardless of storage conditions

This document provides an industry standard for Long Term Storage (LTS) of electronic devices by drawing from the best long term storage practices currently known. LTS is defined as any device storage for more than 12 months but typically allows for much longer (years). While intended to address the storage of unpackaged semiconductors and packaged electronic devices, nothing in this standard precludes the storage of other items under the storage levels defined herein. This standard is not intended to address built-in failure mechanisms (e.g., tin whiskers, plating diffusion, and intermetallics) that would take place regardless of storage conditions

This SAE Aerospace Recommended Practice (ARP) is not a certification document; it contains no certification requirements beyond those already contained in existing certification documents. The purpose of this ARP is to provide: a Guidelines for potential usage of life samples depending upon the mission environment and at user discretion to use them or not. b Guidelines of: 1 Who approves the parts to be used. 2 Notification requirements to manufacturers. 3 Traceability and segregation. 4 Packing and labeling of such parts. This ARP does not claim that the recommended practices and artifacts described herein are the only acceptable ones. They are, however, used widely today, and merit serious consideration of potential usage where applicable in the military and space hardware. This ARP does not supersede any contracts or legal agreements between contractual parties.

This document is an annex to SAE Technical Report SSB-1 (the latest revision). This document provides reference information and guidance concerning methods used by the semiconductor industry and original equipment manufacturers related to radiation hardness assessments. This document is broken into three primary sections. Section 3 discusses part characterization with focus on selection criteria and acceptance testing. Section 4 discusses design hardening for piece parts with focus on degraded design limits and radiation design margin. The last section, Section 5, of this report is on hardness assurance inspection and test. This section discusses total ionizing dose, displacement damage and single event effects testing in detail.

This Bulletin provides a brief description of tin whisker formation and describes various methods recommended by government and industry to reduce the risk of tin whisker-induced failures in electronic hardware. It is not a mandate nor does it contain any requirements. A tin whisker is a single crystal that emerges from tin-finished surfaces. Tin whiskers can pose a serious reliability risk to electronic assemblies that have pure tin finish. The general risks fall into several categories: [1, 2, 3, 8, 16] Short Circuits: The whisker can create a short circuit, either by 1) growing from an area at one potential to an area at another or 2) breaking free and later bridging these areas. In some cases, these shorts may be permanent and cause catastrophic system failures. A transient short may result if the available current exceeds the fusing current of the whisker, and the whisker can fuse open.

This standard documents and establishes common industry practices, and screening and qualification testing, of plastic encapsulated discrete semiconductors (PEDs) for use in military and avionics application environments.

This document establishes the requirements for screening, qualification, and lot acceptance testing of Plastic Encapsulated Discrete Semiconductors (PEDS) for use in space application environments. The scope of this document is intended for standard silicon based technology only, but the process and methodology described within can be adopted for other technologies such as Silicon Carbide, Gallium Nitride, and Gallium Arsenide. However, when non-silicon based technology parts are being used, the device characterization shall be modified, and it is recommended to use available industry standards based upon published research/testing reports for those technology to address applicable physics of failure.

This SAE Aerospace Standard (AS) documents and establishes common industry practices, and screening and qualification testing, of Plastic Encapsulated Microcircuits (PEMs) for use in military and avionics application environments.

This document establishes common industry practices and recommended screening, qualification, and lot acceptance testing of Plastic Encapsulated Microcircuits (PEMs) for use in space application environments.